VLSI Design Questions and Answers - Scaling Factors Part-2

1. Gate capacitance per unit area is scaled by
a) α
b) 1
c) 1/β
d) β

Answer: d
Explanation: Gate capacitance per unit area is scaled by β and this is given by €ox/D.

2. Parasitic capacitance is given by
a) Ax/d
b) Ax * d
c) d/Ax
d) Ax

Answer: a
Explanation: Parasitic capacitance is given by Ax/d where Ax is the area of the depletion region and d is the depletion width.

3. Parasitic capacitance is scaled by
a) β
b) 1/β
c) α
d) 1/α

Answer: d
Explanation: Parasitic capacitance is scaled by 1/α because area is scaled by 1/α2 and d by 1/α. Thus (1/α2)/(1/α) we will get 1/α.

4. Carrier density is scaled by
a) α
b) β
c) 1
d) α2

Answer: c
Explanation: Carrier density in channel Qon is scaled by 1. Carrier density is given by C0*Vgs where C0 is scaled by β and Vgs is scaled by 1/β.

5. Channel resistance Ron is scaled by
a) α
b) β
c) 1
d) α2

Answer: c
Explanation: Channel resistance Ron is scaled by 1. Channel resistance is given by (L/W)*(1/Qonµ).

6. Maximum operating frequency is scaled by
a) α/β
b) β/α
c) α2
d) β2

Answer: c
Explanation: Maximum operating frequency f0 is scaled by α2/β. This is given by (W/L)*(µ*C0*Vdd/Cg).

7. Saturation current is scaled by
a) α
b) β
c) 1/α
d) 1/β

Answer: d
Explanation: Saturation current Idss is scaled by 1/β. This is given by (Co*µ/2)*W/L*(Vgs-Vt)2 .

8. Vgs is scaled by
a) α
b) β
c) 1/α
d) 1/β

Answer: d
Explanation: Gate to source voltage Vgs is scaled by 1/β. All voltages are scaled by 1/β.

9. Current density J is scaled by
a) α/β
b) β/α
c) α2
d) β2

Answer: c
Explanation: Current density J is scaled by α^2/β. Current density is given by Idss/A where Idss is scaled by 1/β and area A by 1/α^2.

10. In constant voltage model, the saturation current is scaled by
a) α
b) β
c) 1
d) β2

Answer: c
Explanation: Saturation current is scaled by 1 in constant voltage model. This is because saturation current is scaled by 1/β and here in constant voltage model β is 1.