1.In a GTO the n+ layer forms the
a) anode & gate
b) cathode & gate
c) cathode
d) gate
Explanation: The bottom n+ layer forms the cathode.
2. The turn-off gain βoff of the GTO is given by
a) Ig/Ia
b) Ia/Ig
c) Vg/Va
d) Vg/Va
Explanation: βoff = (anode current/gate current).
3. A GTO can be represented by two transistors T1 & T2. The current gain of both transistors are α1 and α2 respectively. A low value of gate current requires
a) low value of α1 and α2
b) low value of α1 and high value of α2
c) high value of α1 and low value of α2
d) high values of α1 and α2
Explanation: In order that the gate current for turning-off the device is low, α2 should be made as nearer to unity as possible whereas α1 should be small.
4. Gold doped GTOs have _____________ as compared to the conventional GTOs
a) high turn-off time
b) low negative gate current requirement
c) low reverse voltage blocking capabilities
d) lower positive gate current requirement
Explanation: Gold doping reduces the negative gate current requirements, different kinds of dopings have different advantages over the others.
5. Latching current for the GTOs is ________ as compared to CTs (Conventional thyristors).
a) more
b) less
c) constant
d) cannot be said
Explanation: Latching current of GTOs is 2-4A as compared to 200 to 400 mA in case of CT’s.
6. In case of the two-transistor model (T1 & T2) of GTO with anode-short, the anode-short is placed between the
a) emitter of T1 & T2
b) emitter of T1 & base of T2
c) emitter of T1 & base of T1
d) emitter of T1 & collector of T2
Explanation: Draw the model. The anode-short resistor is connected between emitter (Anode A of GTO) with base of T1 transistor.
7. Choose the correct statement:
GTOs have _________ as compared to the CTs.
a) less on-state voltage drop
b) less gate drive losses
c) higher reverse blocking capabilities
d) faster switching speed
Explanation: GTOs have less turn-on and turn-off time, making it efficient for high frequency applications.
8. An ideal diode has _________ &__________
a) some forward voltage drop, some reverse recovery time
b) high switching losses, high reverse voltage drop
c) no forward voltage drop, negligible reverse recovery time
d) no reverse recovery time, high leakage current
Explanation: An ideal diode has no losses and negligible reverse recovery time
9. A diode circuit is so arranged that when the switch is open it’s KVL gives
Ri+ 1/C ∫i dt = 0
When the switch is closed,
Ri+ 1/C ∫i dt = Vs
Vs is the dc supply voltage.
The diode is so connected that it is forward biased when switch is closed
The circuit is mostly likely be a
a) diode in parallel with Vs, switch, R & C
b) diode in series with R, than parallel with Vs & C
c) diode in series with the switch, R, C & Vs
d) diode in series with R,C & Vs with the switch connected in parallel across Vs
Explanation: Examine the equation, the same current flows through R & C. Also when switch is open, the equation R.H.S is 0. Hence, all the elements are in series.
10. A circuit is so formed such that the source-R-C-diode-switch are in series. Consider the initial voltage across the C to be zero. The diode is so connected that it is forward biased when the switch is closed. When the switch is closed,
a) the current will decay exponentially & the voltage will increase exponentially
b) the current will increase exponentially & the voltage will increase exponentially
c) the current will fall to zero & the voltage both will decay exponentially
d) the voltage and current both remain constant
Explanation: Instant switch is closed, the current is maximum Vs/R than starts to reduce, whereas voltage starts to increase from 0 to Vs (Capacitor Charging).