1. Which of the following is a characteristic of VHDL?
a) Based on C programming language
b) Use of simple data types
c) Case sensitive
d) Strongly typed language
Explanation: VHDL is a strongly typed language i.e. we have to write a long code to define operations.
2. Why do we need concurrent processing for describing digital systems in HDLs?
a) Complexity of digital systems needs concurrent processing
b) Faster processing than conventional programming languages
c) Concurrent processing is easier than sequential processing
d) It allows taking timing constraints into consideration
Explanation: Due to the complexity of digital circuits, we need to process all the instructions at the same time. For example, current can flow in the two branches at the same time which can affect the output of the system, if sequentially processed.
3. After compiling VHDL code with any EDA tool, we get __________
b) Optimized netlist
c) Final device
Explanation: After entering the code into any EDA tool, we need to compile the code. When the compilation is complete, then we get the complete netlist of the system designed by using VHDL. After which optimization process is used to optimize the netlist and then by placement and routing we get final Physical device.
4. An ASIC can be correctly designed by using programming languages like C or Assembly.
Explanation: By using HDL, we specify what we need. We can optimize the circuit by using HDLs. ASIC is a very complex which may consist of millions of transistors. So, we need concurrent execution first of all. Apart from that, we need timing information and other complex features of the digital system too.
5. Which of the following is a characteristic of Verilog HDL?
a) Not portable
b) Case sensitive
c) Strongly typed language
d) Better library
Explanation: Verilog HDL is a case sensitive language which means ‘a’ and ‘A’ means different if you are coding in Verilog.
6. Which of the following HDLs are IEEE standards?
a) Quartus II and MaxPlus II
b) C and C++
c) VHDL and Verilog
d) Altera and Xilinx
Explanation: VHDL and Verilog are the only two HDLs endorsed by IEEE. C andC++ are not HDLs. Altera and Xilinx are devices on which these HDLs can be used. Quartus II and MaxPlus II are the platforms for simulation of hardware described by HDLs.
7. An HDL can’t describe Hardware at Gate level as well as switch level?
Explanation: An HDL supports the hierarchical design process. It can describe the circuit or hardware at every possible level, whether it is gate level or switch level or RTL level.
8. What is the advantage of using VHDL instead of any other HDL?
a) Based on ADA
b) Easy to code
d) Week typing
Explanation: A circuit specified in VHDL can be implemented in different chips and is compatible with CAD tools provided by all companies. Therefore, without any modification, we can use VHDL code anywhere. This is the biggest advantage because digital circuit technology changes rapidly.
9. In what aspect, HDLs differ from other computer programming languages?
a) HDLs describe software and not hardware
b) No aspect; both are same
c) Other computer programming languages have more complexity
d) HDLs describe hardware rather than executing a program on a computer
Explanation: HDLs (Hardware Description Languages) are used to describe hardware for any electronic circuit or system; whereas other computer programming languages execute a program on the computer itself.
10. Why we needed HDLs while having many traditional Programming languages?
a) Some characteristics of digital hardware couldn’t be captured by traditional languages
b) Traditional programming languages are complex
c) HDLs offer more complexity than traditional programming languages
d) HDLs are complementary to traditional programming languages to complete the design process
Explanation: Digital systems are very complex and this complexity is increasing day by day. Some characteristics like propagation delay, concurrent processing and interconnection of parts can’t be captured with traditional languages.