1. The minimum number of clock cycles required in an input pulse width of the RESET pin is
a) 4
b) 2
c) 8
d) 16
Explanation: The active high RESET input clears the internal logic of 80286, and re-initializes it. The reset input pulse width should be at least 16 clock cycles.
2. To filter the output, a 0.047microfarads, 12V capacitor is connected between the pins
a) CAP and ground
b) Output pin and ground
c) CAP and Vcc
d) NMI and ground
Explanation: A 0.047microfarads, 12V capacitor is connected between the CAP pin and ground, to filter the output of the internal substrate bias generator.
3. The signal that causes the 80286 to perform the processor extension interrupt while executing the WAIT and ESC instructions are
a) BUSY (active low)
b) PEACK (active low)
c) PEREQ
d) ERROR (active low)
Explanation: An active ERROR (active low) signal causes the 80286 to perform the processor extension interrupt while executing the WAIT and ESC instructions.
4. The 80286 CPU acts just like that of 8086 when operated in
a) real addressing mode
b) protected virtual address mode
c) real and protected virtual address modes
d) none of the mentioned
Explanation: In the real addressing mode of operation of 80286, it just acts as a fast 8086.
5. In real addressing mode, the 80286 addresses a physical memory of
a) 16 MB
b) 8 MB
c) 2 MB
d) 1 MB
Explanation: In real addressing mode, the 80286 addresses a physical memory of 1 Mbytes using A0-A19. The lines A20-A23 are not used by the internal circuit of 80286 in this mode.
6. In real addressing mode, the 80286 operates at a speed
a) faster than that of 8086
b) half of that of 8086
c) slower than that of 8086
d) same as that of 8086
Explanation: Because of extra pipelining and other circuit level improvements, in real address mode also, the 80286 operates at a much faster rate than 8086
7.In physical memory, if the segment size limit is exceeded by the instruction or data then
a) instruction is not executed
b) exception is generated
c) saves to next segment automatically
d) none of the mentioned
Explanation:An exception is generated if the segment size limit is exceeded by the instruction or the data.
8. The 80286 reserves fixed area of physical memory for
a) system initialization
b) interrupt vector table
c) system initialization and interrupt vector table
d) none of the mentioned
Explanation: The 80286 reserves two fixed areas of physical memory for system initialization and interrupt vector table
9. When 80286 is reset, it always starts its execution in
a) protected virtual addressing mode
b) real addressing mode
c) either real or protected virtual address modes
d) none of the mentioned
Explanation: When 80286 is reset, it always starts its execution in real addressing mode
10. The 80286 in real addressing mode performs
a) initialization of IP
b) enables interrupts
c) sets up descriptor table
d) all of the mentioned
Explanation: The 80286 in real addressing mode performs the following functions: it initializes IP and other registers of 80286, initializes the peripheral, enables interrupts, sets up descriptor tables, and then prepares it for entering the protected virtual address mode.