Microprocessor Questions and Answers Part-15

1. The time taken by the ADC from the active edge of SOC(start of conversion) pulse till the active edge of EOC(end of conversion) signal is called
a) edge time
b) conversion time
c) conversion delay
d) time delay

Answer: c
Explanation: Broadly speaking, the time taken by the converter to calculate the equivalent digital data output from the moment of the start of conversion is called conversion delay

2. The popular technique that is used in the integration of ADC chips is
a) successive approximation
b) dual slope integration
c) successive approximation and dual slope integration
d) none

Answer: c
Explanation: Successive approximation and dual slope integration are the most popular techniques that are used in the integrated ADC chips.

3.The procedure of algorithm for interfacing ADC contain
a) ensuring stability of analog input
b) issuing start of conversion pulse to ADC
c) reading digital data output of ADC as equivalent digital output
d) all of the mentioned

Answer: d
Explanation: The general algorithm for interfacing ADC contains ensuring the stability of analog input, issuing start of conversion pulse to ADC, reading end of conversion signal to mark the end of a conversion process, reading digital data output of ADC as equivalent digital output.

4. Which is the ADC among the following?
a) AD 7523
b) 74373
c) 74245
d) ICL7109

Answer: d
Explanation: AD 7523 is a DAC(Digital to analog converter), 74373 is a latch, 74245 is transceiver and ICL7109 is an ADC.

5. The conversion delay in a successive approximation of an ADC 0808/0809 is
a) 100 milliseconds
b) 100 microseconds
c) 50 milliseconds
d) 50 milliseconds

Answer: b
Explanation: The conversion delay is 100 microseconds which is low as compared to other converters.

6. The number of inputs that can be connected at a time to an ADC that is integrated with successive approximation is
a) 4
b) 2
c) 8
d) 16

Answer: c
Explanation: As these converters internally have 3:8 analog multiplexer, at a time 8 different analog inputs can be connected to the chip.

7. ADC 7109 integrated by Dual slope integration technique is used for
a) low cost option
b) slow practical applications
c) low complexity
d) all of the mentioned

Answer: d
Explanation: Compared to other 12-bit ADCs, it is of very low cost and useful for slow practical applications.

8.Which of the following is not one of the phases of the total conversion cycle?
a) autozero phase
b) conversion phase
c) signal integrate phase
d) disintegrate phase

Answer: b
Explanation: Autozero phase, signal integrate phase and disintegrate phase are the three phases of total conversion cycle

9.Which of the following phase contain feedback loop in it?
a) autozero phase
b) signal integrate phase
c) disintegrate phase
d) none

Answer: a
Explanation: A feedback loop is closed around the system to charge the autozero capacitor to compensate for the offset voltages in the buffer amplifier, integrator and comparator.

10. In the signal integrate phase, the differential input voltage between IN LO(input low) and IN HI(input high) pins is integrated by the internal integrator for a fixed period of
a) 256 clock cycles
b) 1024 clock cycles
c) 2048 clock cycles
d) 4096 clock cycles

Answer: c
Explanation: The internal integrator needs 2048 clock cycles to integrate voltage difference between input low and input high.