Microprocessor Questions and Answers Part-25

1. The instruction that stores a copy of top of the stack into the memory, and pops the top of the stack is
a) FST
b) FSTP
c) FIST
d) FLD

Answer: b
Explanation: FSTP (store floating point number and pop) stores a copy of top of the stack into memory or any coprocessor register, and then pops the top of the stack.

2. The instruction that multiplies the content of the stack top by 2n is
a) FMUL
b) FPREM
c) FSCAL
d) FCSH

Answer: c
Explanation: FSCAL instruction multiplies the content of the stack top by 2n, where n is an integral part of stack and stores the result in stack.

3. If the opcode bit is D=1, then the source and destination operands are
a) incremented
b) decremented
c) cleared
d) interchanged

Answer: d
Explanation: If D=1, then it interchanges the source and destination operands.

4. The 8089 shares the system bus and memory with the host CPU in
a) tightly coupled configuration
b) loosely coupled configuration
c) tightly and loosely coupled configurations
d) none of the mentioned

Answer: a
Explanation: In a tightly coupled configuration, the 8089 shares the system bus and memory with the host CPU using its RQ (active low) or GT (active low) pins

5. The 8089 communicates with the host CPU using bus arbiter and controller in
a) tightly coupled configuration
b) loosely coupled configuration
c) tightly and loosely coupled configurations
d) none of the mentioned

Answer: b
Explanation: In a loosely coupled configuration, the 8089 has its own local bus and communicates with the host CPU using bus arbiter and controller

6. The number of address lines used by the I/O processor in 8089 is
a) 20
b) 12
c) 16
d) 8

Answer: c
Explanation: The 8089 I/O processor uses only 16 address lines, and thus it can address only 64KB of IO space.

7.The IO device that can be interfaced with 8089 is
a) 16-bit IO
b) 8-bit IO
c) 64-bit IO
d) 16-bit and 8-bit IO

Answer: d
Explanation: The 8089 handled IO devices need not have the same data bus width as that of 8089. This enables even 8-bit IO devices to be interfaced easily with 8089.

8. In the 8089 architecture, the address of memory table for channel-2 is calculated by
a) adding 16 to the contents of CCP
b) adding 8 to the contents of CCP
c) adding memory table address of channel-1
d) none of the mentioned

Answer: b
Explanation: The address of the memory table for channel-2 is calculated by adding 8 to the contents of CCP or by adding memory table address for channel-1 to the contents of CCP

9. Which of the following is not a general purpose register of 8089?
a) GA
b) BC
c) CX
d) MC

Answer: c
Explanation: The registers GA, GB, GC, BC, IX and MC can be used as general purpose registers.

10. The registers that are used as source and destination pointers during DMA operations are
a) GB, GC
b) GC, BC
c) GC, GA
d) GA, GB

Answer: d
Explanation: GA register is used as source and GB as destination pointers during DMA operations.