1. The block of 8237 that decodes the various commands given to the 8237 by the CPU is
a) timing and control block
b) program command control block
c) priority block
d) none of the mentioned
Explanation: The program control block decodes various commands given to the 8237 by the CPU before servicing a DMA request.
2.The priority between the DMA channels requesting the services can be resolved by
a) timing and control block
b) program command control block
c) priority block
d) none of the mentioned
Explanation: The priority encoder block resolves the priority between the DMA channels requesting the services.
3. The register that holds the current memory address is
a) current word register
b) current address register
c) base address register
d) command register
Explanation: The current address register holds the current memory address. The current address register is accessed during the DMA transfer.
4. The register that holds the data byte transfers to be carried out is
a) current word register
b) current address register
c) base address register
d) command register
Explanation: The current word register is a 16-bit register that holds the data transfers. The word count is decremented after each transfer, and the new value is stored again in the register.
5. When the count becomes zero in the current word register then
a) Input signal is enabled
b) Output signal is enabled
c) EOP (end of process) is generated
d) Start of process is generated
Explanation: When the count becomes zero, the EOP signal is generated. This can be written in successive bytes by the CPU, in program mode.
6. The current address register is programmed by the CPU as
a) bit-wise
b) byte-wise
c) bit-wise and byte-wise
d) none of the mentioned
Explanation: The current address register is byte-wise programmed by the CPU, i.e. lower byte first and the higher byte later.
7.Which of these register’s contents is used for auto-initialization (internally)?
a) current word register
b) current address register
c) base address register
d) command register
Explanation: The contents of base address register cannot be read by the CPU. These contents are used internally for auto-initialization.
8. The register that maintains an original copy of the respective initial current address register and current word register is
a) mode register
b) base address register
c) command register
d) mask register
Explanation: The base address register maintains an original copy of the current address register and current word register, before incrementing or decrementing.
9. The register that can be automatically incremented or decremented, after each DMA transfer is
a) mask register
b) mode register
c) command register
d) current address register
Explanation: The address is automatically incremented or decremented after each DMA transfer, and the resulting address value is again stored in the current address register.
10. Which of the following is a type of DMA transfer?
a) memory read
b) memory write
c) verify transfer
d) all of the mentioned
Explanation: Memory read, memory write and verify transfer are the three types of DMA transfer.