1. Which of the following microprocessor is designed by Zilog?
a) Z80
b) Zigbee
c) 80386
d) 8087
Explanation: Z80 is designed by Zilog in 1976. 80386 and 8087 are the processors designed by Intel and Zigbee is IEEE based which is used for high-level communication protocol.
2. Z80 is mainly based on
a) MIPS
b) Intel 8080
c) TIMS
d) 8051
Explanation: Its architecture is based on Intel 8080 but has an extended instruction set and hardware improvement.
3. Flag register of Z80 is also known as
a) Program status register
b) Program status address
c) Program status word
d) Program address register
Explanation: The flag register of Z80 contains status information such as carry, overflow, signed etc. etc.
4. What is the purpose of memory refresh register of Z80?
a) To control on-chip DRAM
b) To control on-chip SRAM
c) To control ROM
d) To clear cache
Explanation: In addition to the general purpose registers, a stack pointer, program counter, and two index registers are included in Z80. It was also used in many embedded designs because of its high-quality performance and for its in-built refresh circuitry for DRAMs.
5. What is the clock frequency of Z80?
a) 6 MHz
b) 8 MHz
c) 4 MHz
d) 2 MHz
Explanation: It is the maximum clock frequency or runs a time of the processor.
6. Which are the two additional registers of Z80?
a) Interrupt and NMI
b) NMI and PSW
c) Interrupt vector and memory refresh
d) NMI and memory refresh
Explanation: The Interrupt vector(IV) register is used in the interrupt handling. Mode 2 is used to point the required software routine to process the interrupt. In mode 1, the interrupt vector is supplied via the external data bus.
7. By which instruction does the switching of registers take place?
a) Instruction opcodes
b) AXX instruction
c) EXX instruction
d) Register instruction
Explanation: Only one set of registers can be used at one time and the switching of registers and data transfer is performed by the EXX instruction.
8. Which of the following can be a paired set of 16-bit register?
a) CD
b) HL
c) AB
d) EH
Explanation: Registers B, C, D, E, H and L are 8-bit general-purpose registers that can be concatenated to produce 16 registers known as BC, DE, and HL.
9. Which signal is used to differentiates the access from a normal memory cycle?
a) HALT
b) RESET
c) MREQ
d) IORQ
Explanation: The IORQ signal is used to differentiate the access from a normal memory cycle. These input/output accesses are similar from a hardware perspective to a memory cycle but only occur when an input/output port instruction is executed.
10. What is done in mode 1 of Z80?
a) Interrupt vector is supplied via the external bus
b) Interrupt vector is supplied via the peripherals
c) NMI gets started
d) Interrupt gets acknowledge from peripheral
Explanation: In mode 1, the interrupt vector is supplied via the external data bus. The memory refresh register is used to control the on-chip DRAM refresh circuitry.