1. Which mode of 8253 can provide pulse width modulation?
a) programmable one-shot
b) square wave rate generator
c) software triggered strobe
d) hardware triggered strobe
Explanation: Mode 1 of the Intel 8253 can provide pulse width modulation for the power control where the gate is connected to a zero crossing detector or a clock source
2. Which of the following is the mode 3 in the Intel timer 8253?
a) rate generator
b) hardware triggered strobe
c) square wave rate generator
d) software triggered strobe
Explanation: The rate generator is the mode 3 in Intel 8253 timer. The square wave generator is the mode 4 and the hardware triggered strobe is the mode 5 in the Intel 8253 timer.
3. Which of the following determines the rate generation?
a) divide by N
b) multiply by N
c) addition by N
d) subtraction by N
Explanation:The rate generator mode is determined by the mode 3 with the Intel 8253. It is a simple divide by N mode where N is the initial value loaded into the counter.
4. Which mode of the Intel 8253 timer can generate a square wave?
a) mode 1
b) mode 2
c) mode 3
d) mode 4
Explanation: The mode 4 is the square wave generator. This mode is similar to mode 3 except that the waveform is a square wave.
5. Which of the following is the pin efficient method of communicating between other devices?
a) serial port
b) parallel port
c) peripheral port
d) memory port
Explanation: The serial ports are considered to be the pin efficient method of communication between other devices within an embedded system.
6. Which of the following depends the number of bits that are transferred?
a) wait statement
b) ready statement
c) time
d) counter
Explanation: The time taken for the data transmission within the system depends on the clock frequency and the number of bits that are transferred
7. Which of the following is the most commonly used buffer in the serial porting?
a) LIFO
b) FIFO
c) FILO
d) LILO
Explanation: Most of the serial ports uses a FIFO buffer so that the data is not lost. The FIFO buffer is read to receive the data, that is, first in first out.
8. What does SPI stand for?
a) serial parallel interface
b) serial peripheral interface
c) sequential peripheral interface
d) sequential port interface
Explanation: The serial parallel interface bus is a commonly used interface which involves master slave mechanism. The shift registers are worked as master and the slave devices are driven by a common clock.
9. Which allows the full duplex synchronous communication between the master and the slave?
a) SPI
b) serial port
c) I2C
d) parallel port
Explanation: The serial peripheral interface allows the full duplex synchronous communication between the master and the slave devices. MC68HC05 developed by Motorola uses SPI for interfacing the peripheral devices.
10. Which of the following processor uses SPI for interfacing?
a) 8086
b) 8253
c) 8254
d) MC68HC11
Explanation: The MC68HC05 and MC68HC11 microcontrollers use the serial peripheral interface for the peripheral interfacing.