Embedded System Questions and Answers Part-16

1. Which of the memory organisation is widely used in parity bit?
a) by 1 organisation
b) by 4 organisation
c) by 8 organisation
d) by 9 organisation

Answer: a
Explanation: The use of By 1 organisation is declined because of the wider data path devices. But it is still used in parity bit and were used in SIMM memory.

2. Which configuration of memory organisation replaces By 1 organisation?
a) by 4 organisation
b) by 8 organisation
c) by 9 organisation
d) by 16 organisation

Answer: a
Explanation: By 1 organisation is replaced with By 4 organisation because of its reduced address bus and complexity

3. Which shifting helps in finding the physical address in 8086?
a) shifting the segment by 8
b) shifting the segment by 6
c) shifting the segment by 4
d) shifting the segment by 2

Answer:c
Explanation: The address bus of the 8086 is 20-bit and the data bus is 16-bit in size. So the physical address can be calculated by shifting the segment register by 4 to left and by adding the address bus to it.

4. Which memory organisation is supported in wider memories?
a) by 8 organisation
b) by 16 organisation
c) by 9 organisation
d) by 4 organisation

Answer: b
Explanation: The wider memories support 16-bits because it can integrate more number of the interface logic so that the time consumed by the latches and buffers removes the memory access thus allowing the slower parts to be used in wait state free designs.

5. Which of the following is a plastic package used primarily for DRAM?
a) SIMM
b) DIMM
c) Zig-zag
d) Dual-in-line

Answer: c
Explanation: Zig-zag package of memory is a plastic package used for DRAM. The leads of this package are arranged in a zigzag manner.

6. Which is the very basic technique of refreshing DRAM?
a) refresh cycle
b) burst refresh
c) distributive refresh
d) software refresh

Answer: a
Explanation: The DRAM needs to be periodically refreshed and the very basic technique is a special refresh cycle, during these cycles no other access is permitted. The whole chip is refreshed within a particular time period otherwise, the data will be lost.

7. How is the refresh rate calculated?
a) by refresh time
b) by the refresh cycle
c) by refresh cycle and refresh time
d) refresh frequency and refresh cycle

Answer: c
Explanation: The time required for refreshing the whole chip is known as refresh time. The number of access needed to complete refresh is called as the number of cycles. The number of cycles divided by the refresh time gives the refresh rate.

8. Which is the commonly used refresh rate?
a) 125 microseconds
b) 120 microseconds
c) 130 microseconds
d) 135 microseconds

Answer: a
Explanation: There are two refresh rates used in common. They are standard refresh rate of 15.6 microseconds and 125 microseconds which the extended form.

9. How can we calculate the length of the refresh cycle?
a) twice of normal access
b) thrice of normal access
c) five times of normal access
d) six times of normal access

Answer: a
Explanation: Each of the refresh cycles is approximately as twice as the length of the normal access, for example, a 70ns DRAM has a refresh cycle time of 130ns.

10. What type of error occurs in the refresh cycle of the DRAM?
a) errors in data
b) power loss
c) timing issues
d) not accessing data

Answer: c
Explanation: When the refresh cycle in a DRAM is running, it will not access data, so the processor will have to wait for its data. This arises some timing issues.