1. In memory-mapped I/O ____________
a) The I/O devices and the memory share the same address space
b) The I/O devices have a separate address space
c) The memory and I/O devices have an associated address space
d) A part of the memory is specifically set aside for the I/O operation
Explanation: Its the different modes of accessing the i/o devices.
2. The usual BUS structure used to connect the I/O devices is ___________
a) Star BUS structure
b) Multiple BUS structure
c) Single BUS structure
d) Node to Node BUS structure
Explanation: BUS is a collection of address, control and data lines used to connect the various devices of the computer.
3. In intel’s IA-32 architecture there is a separate 16 bit address space for the I/O devices.
a) false
b) true
Explanation: This type of access is called as I/O mapped devices.
4. The advantage of I/O mapped devices to memory mapped is ___________
a) The former offers faster transfer of data
b) The devices connected using I/O mapping have a bigger buffer space
c) The devices have to deal with fewer address lines
d) No advantage as such
Explanation: Since the I/O mapped devices have a separate address space the address lines are limited by the amount of the space allocated.
5. The system is notified of a read or write operation by ___________
a) Appending an extra bit of the address
b) Enabling the read or write bits of the devices
c) Raising an appropriate interrupt signal
d) Sending a special signal along the BUS
Explanation: It is necessary for the processor to send a signal intimating the request as either read or write.
6. To overcome the lag in the operating speeds of the I/O device and the processor we use ___________
a) BUffer spaces
b) Status flags
c) Interrupt signals
d) Exceptions
Explanation: The processor operating is much faster than that of the I/O devices, so by using the status flags the processor need not wait till the I/O operation is done. It can continue with its work until the status flag is set.
7. The method of accessing the I/O devices by repeatedly checking the status flags is ___________
a) Program-controlled I/O
b) Memory-mapped I/O
c) I/O mapped
d) None of the mentioned
Explanation: In this method, the processor constantly checks the status flags, and when it finds that the flag is set it performs the appropriate operation.
8. The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready is?
a) Exceptions
b) Signal handling
c) Interrupts
d) DMA
Explanation: This is a method of accessing the I/O devices which gives the complete power to the devices, enabling them to intimate the processor when they’re ready for transfer.
9. The method which offers higher speeds of I/O transfers is ___________
a) Interrupts
b) Memory mapping
c) Program-controlled I/O
d) DMA
Explanation: In DMA the I/O devices are directly allowed to interact with the memory without the intervention of the processor and the transfers take place in the form of blocks increasing the speed of operation.
10. The process wherein the processor constantly checks the status flags is called as ___________
a) Polling
b) Inspection
c) Reviewing
d) Echoing
Explanation: The process wherein the processor constantly checks the status flags is called as Polling